For high-speed integrated circuit devices, transmission line effect cannot be ignored. To achieve better signal integrity, output drivers should generally have a fixed resistance value under different process, temperature and voltage (PVT) variations. Metal oxide semiconductor (MOS) devices are usually adopted for driver implementation.
FIG. 1 shows an output driver 101 of a terminated input/output (I/O) interface. The output driver 101 includes a transmission line 106, input termination impedance control for the pull-up device 102, input termination impedance control for the pull-down device 104, a terminated control connection 108 and a receiver 110. The output voltage Vo will also be referred to as the output voltage Vddq. In a conventional output driver 101, one type of MOS device is typically used for the pull-up device 102, and one type of MOS device is typically used for the pull-down device 104. For example, a positive channel MOS (PMOS) device is typically used for the pull-up device 102, and a negative channel MOS (NMOS) device is typically used for the pull-down device 104.
FIG. 4 shows a simplified ideal output device having pull-up and pull-down circuitry. This simplified output device includes a PMOS device ohp and an NMOS device ohn. The PMOS device ohp and the NMOS device ohn ideally have linear impedance characteristics of resistors. The PMOS device ohp has an output current Iohp. The NMOS device has an output current Iohn. The summation of these currents is the output current Iohout. A conventional output device has an array of these PMOS and NMOS pairs. The pull-up device 102 is ideally calibrated at the midpoint of the voltage Vddq with PMOS devices. Accordingly, each PMOS device would have a corresponding NMOS device. The PMOS devices are used to calibrate the pull-up device 102 at the Vddq midpoint. The NMOS devices are used to calibrate the pull-down device 104 at the Vddq midpoint.
FIG. 5 is a graph showing the behavior of the currents of the simplified ideal output driver of FIG. 4. The graph includes PMOS statistical data for the current Iohp, NMOS statistical data for the current Iohn, the actual output current Iohout, and the ideal output current Ideal. The graph shows the relationship between the output current Ioh, on the vertical axis, and the output voltage Voh, on the horizontal axis. The output current Iohout is a summation of the PMOS statistical data for the current Iohp and the NMOS statistical data for the current Iohn. Ideally, the summation of the currents Iohp and Iohn is a straight line, as shown by the ideal output current Ideal. The actual output current Iohout is relatively close to being ideal.
FIG. 2 shows a conventional impedance control circuit 201 for calibrating the proper pull-up for a conventional output driver. An external resistor 202 coupled to the chip determines the value of the output driver impedance. A pull-up impedance emulator 204 is placed in the impedance control circuit 201 to emulate the output driver electrical characteristics. The control circuit 201 includes a certain amount of chip impedance error 214 between the pull-up impedance emulator 204 and the external resistor 202.
The pull-up impedance emulator 204 is typically scaled down to a certain ratio to form a proper voltage divider with the external resistor 202. The pull-up impedance emulator includes fingers, or an array, of PMOS devices, which can each be enabled or disabled. The comparator 210 compares the impedance of the pull-up impedance emulator 204 with the external resistor 202. The impedance control circuit 201 either turns on more fingers or fewer fingers until the transistors' impedance reaches the required accuracy. The control circuit 201 uses a counter 206 to count the proper number of MOS device fingers to turn on. The control circuit 201 then generates a binary code 208 for use in the output driver. A comparator 210 registers the result for use in the output driver.
The external resistor 202 is usually 5 times the impedance of the required output driver impedance. Accordingly, the pull-up impedance emulator 204 is usually set to one-fifth (⅕) the size of the output driver. This setting is ideal for an impedance calibrated at the Vddq midpoint 212. The impedance emulator 204 is compared to the voltage Vddq midpoint 212, in other words, Vddq/2. In FIG. 2, the impedance emulator emulates the impedance of the pull-up of the output driver for proper calibration.
FIG. 3 is a conventional impedance control circuit 203 for calibrating the proper pull-down for the conventional output driver. The comparator 210 compares a pull-down impedance emulator 216 to the pull-up impedance emulator 204. It is known that the pull-up impedance emulator 204 is calibrated at the Vddq midpoint 212, that the conventional output driver PMOS devices are used for the pull-up device 102, and that NMOS devices are used for the pull-down device 104. Accordingly, the pull-down impedance emulator 216 will also be calibrated to the voltage Vddq midpoint 212 to balance the calibration of the pull-up impedance. Note that the chip impedance error 214 becomes part of the comparison and that the pull-down 216 is calibrated accordingly.
Unfortunately, using PMOS devices only for pull-up or NMOS devices only for pull-down cannot serve the purpose of achieving better signal integrity because PMOS devices and NMOS devices show different impedances under different bias conditions. Thus, for an output driver 101, the output voltage level will not stay at the voltage level Vddq/Ground.
FIG. 6 is a graph of the relationship between the impedance (Z) error, on the vertical axis, and the output voltage Voh, on the horizontal axis. This graph provides statistical information of an output driver having pull-up and pull-down devices calibrated at the voltage Vddq midpoint, in other words, the voltage level Vddq/2. As shown in FIG. 6, when the output driver impedance is calibrated at the voltage Vddq midpoint, the output voltage Voh can exhibit an undue amount of error in the output driver circuitry. In other words, the output driver is only accurate when the output level is near 50% of the voltage Vddq, midway between pull-up and pull-down. Because the output voltage level does not stay at the voltage level Vddq/Ground, a conventional output driver calibrated at the voltage Vddq midpoint will exhibit an undue amount of error much of the time.